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| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT7540 Octal Schmitt trigger buffer/line driver; 3-state; inverting Product specification Supersedes data of March 1988 File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Octal Schmitt trigger buffer/line driver; 3-state; inverting FEATURES * Inverting outputs * Schmitt trigger action on all data inputs * Output capability: bus driver * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT7540 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns 74HC/HCT7540 The 74HC/HCT7540 are octal Schmitt trigger inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs OE1 and OE2. A HIGH on OEn causes the outputs to assume a high impedance OFF-state. The Schmitt trigger action in the data inputs transforms slowly changing input signals into sharply defined jitter-free output signals. The "7540" is identical to the "540" but has hysteresis on the data inputs. TYPICAL SYMBOL PARAMETER tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". propagation delay An to Yn input capacitance power dissipation capacitance per buffer notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 11 3.5 29 HCT 16 3.5 31 ns pF pF UNIT December 1990 2 Philips Semiconductors Product specification Octal Schmitt trigger buffer/line driver; 3-state; inverting PIN DESCRIPTION PIN NO. 1, 19 2, 3, 4, 5, 6, 7, 8, 9 10 18, 17, 16, 15, 14, 13, 12, 11 20 SYMBOL OE1, OE2 A0 to A7 GND Y0 to Y7 VCC NAME AND FUNCTION output enable inputs (active LOW) data inputs ground (0 V) bus outputs positive supply voltage 74HC/HCT7540 Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December 1990 3 Philips Semiconductors Product specification Octal Schmitt trigger buffer/line driver; 3-state; inverting FUNCTION TABLE INPUTS OE1 L L X H Notes 1. H = HIGH voltage level L = LOW voltage level X = don't care Z = high impedance OFF-state OE2 L L H X An L H X X OUTPUTS Yn H L Z Z 74HC/HCT7540 Fig.4 Functional diagram. Fig.5 Logic diagram. December 1990 4 Philips Semiconductors Product specification Octal Schmitt trigger buffer/line driver; 3-state; inverting DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Transfer characteristics are given below (not applicable for OEn inputs). Output capability: bus driver ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25 min. typ. tPHL/ tPLH propagation delay An to Yn 3-state output enable time OEn to Yn 3-state output disable time OEn to Yn output transition time 39 14 11 41 15 12 52 19 15 14 5 4 -40 to +85 max. min. max. 120 24 20 150 30 26 150 30 26 60 12 10 150 30 26 190 38 33 190 38 33 75 15 13 -40 to +125 min. max. 180 36 31 225 45 38 225 45 38 90 18 15 ns 74HC/HCT7540 TEST CONDITIONS UNIT VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Fig.8 tPZH/ tPZL ns Fig.9 tPHZ/ tPLZ ns Fig.9 tTHL/ tTLH ns Fig.8 TRANSFER CHARACTERISTICS FOR 74HC Voltages are referred to GND (ground = 0 V) Tamb (C) 74HC SYMBOL PARAMETER +25 min. typ. VT+ positive-going threshold max. 1.50 3.15 4.20 0.30 1.35 1.80 0.20 0.40 0.50 0.10 0.25 0.30 -40 to +85 min. max. 1.50 3.15 4.20 0.30 1.35 1.80 0.10 0.25 0.30 -40 to +125 min. max. 1.50 3.15 4.20 V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Figs 6 and 7 UNIT V CC WAVEFORMS (V) TEST CONDITIONS VT- negative-going threshold 0.30 1.35 1.80 hysteresis (VT+ - VT-) 0.10 0.25 0.30 V Figs 6 and 7 VH V Figs 6 and 7 December 1990 5 Philips Semiconductors Product specification Octal Schmitt trigger buffer/line driver; 3-state; inverting DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Transfer characteristics are given below (not applicable for OEn inputs). Output capability: bus driver ICC category: MSI 74HC/HCT7540 Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT OE1 OE2 An UNIT LOAD 1.30 1.30 0.20 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER min tPHL/ tPLH tPZH/ tPZL tPHZ/ tPLZ tTHL/ tTLH propagation delay An to Yn 3-state output enable time OEn to Yn 3-state output disable time OEn to Yn output transition time +25 -40 to +85 -40 to +125 max. 48 48 48 18 ns ns ns ns 4.5 4.5 4.5 4.5 Fig.8 Fig.9 Fig.9 Fig.8 UNIT V CC WAVEFORMS (V) TEST CONDITIONS typ. max. min 19 19 20 5 32 32 32 12 max. min. 40 40 40 15 TRANSFER CHARACTERISTICS FOR 74HCT Voltages are referred to GND (ground = 0 V) Tamb (C) 74HCT SYMBOL PARAMETER min VT+ VT- VH positive-going threshold negative-going threshold hysteresis (VT+ - VT-) 0.70 0.80 0.17 0.23 0.17 0.23 +25 -40 to +85 -40 to +125 min. max. 2.0 2.1 0.60 0.70 V V V 4.5 5.5 4.5 5.5 4.5 5.5 Figs 6 and 7 Figs 6 and 7 Figs 6 and 7 UNIT V CC WAVEFORMS (V) TEST CONDITIONS typ. max. min max. 2.0 2.1 0.64 0.74 2.0 2.1 December 1990 6 Philips Semiconductors Product specification Octal Schmitt trigger buffer/line driver; 3-state; inverting TRANSFER CHARACTERISTIC WAVEFORMS 74HC/HCT7540 Fig.6 Transfer characteristic. Fig.7 Waveforms showing the definition of VT+, VT- and VH. AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.8 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.9 Waveforms showing the 3-state enable and disable times. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 7 This datasheet has been download from: www..com Datasheets for electronics components. |
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